Visual Studio FPGA Tips and Traps
This weekend I went from File-New-Project, Right-Click - Build... to a ULX3S bit file! This was...
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This weekend I went from File-New-Project, Right-Click - Build... to a ULX3S bit file! This was...
After the previous pains of getting Circuit Python to just build for the FOMU, it...
I started down the road of learning FPGA Circuit Python last month, with the (admittedly...
My next post (aka notes to self) on getting a RISC-V compiled app onto the...
First .. the exciting news: With 24 days still left in the Crowd Funding Campaign,...
My ESP32-S2 Saola R1 arrived!! What exactly is that? Well, Iwondered the same thing. Per...
Today is ULX3S Campaign Launch Day on Crowd Supply!!As I write this, funding is at...
Some notes on setting up a soft RISC-V CPU to run Circuit Python.I started with...